EPC9143 300 W 16th Brick DC/DC Module Reference Design

Device analog input pin, register and interrupt vector assignments of output voltage feedback signal(s) More...

+ Collaboration diagram for Microcontroller Abstraction:
#define BUCK_VOUT_ANSEL   _ANSELA0
 ADC input assignments of output voltage feedback signals. More...
 
#define BUCK_VOUT_ADCCORE   0
 0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core More...
 
#define BUCK_VOUT_ADCIN   0
 Analog input number (e.g. '5' for 'AN5') More...
 
#define BUCK_VOUT_ADCBUF   ADCBUF0
 ADC input buffer of this ADC channel. More...
 
#define BUCK_VOUT_ADCTRIG   PG2TRIGA
 Register used for trigger placement. More...
 
#define BUCK_VOUT_TRGSRC   BUCK_PWM1_TRGSRC_TRG1
 PWM1 (=PG2) Trigger 1 via PGxTRIGA. More...
 

Detailed Description

Device analog input pin, register and interrupt vector assignments of output voltage feedback signal(s)

Macro Definition Documentation

◆ BUCK_VOUT_ADCBUF

#define BUCK_VOUT_ADCBUF   ADCBUF0

ADC input buffer of this ADC channel.

Definition at line 510 of file epc9143_r40_hwdescr.h.

◆ BUCK_VOUT_ADCCORE

#define BUCK_VOUT_ADCCORE   0

0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core

Definition at line 508 of file epc9143_r40_hwdescr.h.

◆ BUCK_VOUT_ADCIN

#define BUCK_VOUT_ADCIN   0

Analog input number (e.g. '5' for 'AN5')

Definition at line 509 of file epc9143_r40_hwdescr.h.

◆ BUCK_VOUT_ADCTRIG

#define BUCK_VOUT_ADCTRIG   PG2TRIGA

Register used for trigger placement.

Definition at line 511 of file epc9143_r40_hwdescr.h.

◆ BUCK_VOUT_ANSEL

#define BUCK_VOUT_ANSEL   _ANSELA0

ADC input assignments of output voltage feedback signals.

In this section the ADC input channels, related ADC result buffers, trigger sources and interrupt vectors are defined. These settings allow the fast re-assignments of feedback signals in case of hardware changes. GPIO analog function mode enable bit

Definition at line 507 of file epc9143_r40_hwdescr.h.

◆ BUCK_VOUT_TRGSRC

#define BUCK_VOUT_TRGSRC   BUCK_PWM1_TRGSRC_TRG1

PWM1 (=PG2) Trigger 1 via PGxTRIGA.

Definition at line 512 of file epc9143_r40_hwdescr.h.