EPC9143 300 W 16th Brick DC/DC Module Reference Design

Device analog input pin, register and interrupt vector assignments of input voltage feedback signal(s) More...

+ Collaboration diagram for Microcontroller Abstraction:
#define _BUCK_VIN_ADCInterrupt   _ADCAN9Interrupt
 ADC input assignments of input voltage feedback signals. More...
 
#define _BUCK_VIN_ADCISR_IF   _ADCAN9IF
 ADC interrupt flag bit of the input voltage feedback channel. More...
 
#define BUCK_VIN_ANSEL   _ANSELA2
 GPIO analog function mode enable bit. More...
 
#define BUCK_VIN_ADCCORE   8
 0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core More...
 
#define BUCK_VIN_ADCIN   9
 Analog input number (e.g. '5' for 'AN5') More...
 
#define BUCK_VIN_ADCBUF   ADCBUF9
 ADC input buffer of this ADC channel. More...
 
#define BUCK_VIN_ADCTRIG   PG4TRIGA
 Register used for trigger placement. More...
 
#define BUCK_VIN_TRGSRC   BUCK_PWM2_TRGSRC_TRG1
 PWM2 (=PG4) Trigger 1 via PGxTRIGA. More...
 

Detailed Description

Device analog input pin, register and interrupt vector assignments of input voltage feedback signal(s)

Macro Definition Documentation

◆ _BUCK_VIN_ADCInterrupt

#define _BUCK_VIN_ADCInterrupt   _ADCAN9Interrupt

ADC input assignments of input voltage feedback signals.

In this section the ADC input channels, related ADC result buffers, trigger sources and interrupt vectors are defined. These settings allow the fast re-assignments of feedback signals in case of hardware changes. ADC interrupt service routine function call of the input voltage feedback channel

Definition at line 430 of file epc9143_r40_hwdescr.h.

◆ _BUCK_VIN_ADCISR_IF

#define _BUCK_VIN_ADCISR_IF   _ADCAN9IF

ADC interrupt flag bit of the input voltage feedback channel.

Definition at line 431 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_ADCBUF

#define BUCK_VIN_ADCBUF   ADCBUF9

ADC input buffer of this ADC channel.

Definition at line 436 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_ADCCORE

#define BUCK_VIN_ADCCORE   8

0=Dedicated Core #0, 1=Dedicated Core #1, 8=Shared ADC Core

Definition at line 434 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_ADCIN

#define BUCK_VIN_ADCIN   9

Analog input number (e.g. '5' for 'AN5')

Definition at line 435 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_ADCTRIG

#define BUCK_VIN_ADCTRIG   PG4TRIGA

Register used for trigger placement.

Definition at line 437 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_ANSEL

#define BUCK_VIN_ANSEL   _ANSELA2

GPIO analog function mode enable bit.

Definition at line 433 of file epc9143_r40_hwdescr.h.

◆ BUCK_VIN_TRGSRC

#define BUCK_VIN_TRGSRC   BUCK_PWM2_TRGSRC_TRG1

PWM2 (=PG4) Trigger 1 via PGxTRIGA.

Definition at line 438 of file epc9143_r40_hwdescr.h.